Avicena raises $25m Series A to develop its photonic I/O solution

Bardia Pezeshki, Founder and Chief Executive Officer of Avicena

AvicenaTech Corp., a microLED-based chip-to-chip interconnects provider, announced that the company has secured $25 million in Series A funding from Samsung Catalyst Fund, Cerberus Capital Management, Clear Ventures, and Micron Ventures to further drive the development of products based on Avicena’s breakthrough photonic I/O solution.

What is the product offering of Avicena?

Avicena’s LightBundleTM I/O solution eliminates bottlenecks of copper links triggered by power consumption, latency, reach and bandwidth density thus improving existing system performance. This enables higher-performing architectures in AI, machine learning (ML), cloud computing, next generation cellular radio, remote sensing, and aerospace applications.

The groundbreaking LightBundleTM technology is uniquely based on arrays of GaN micro-emitters that leverage the microLED display ecosystem and can be integrated onto any high-performance CMOS IC. Avicena’s technology leverages recent advances in the display industry to enable high volume, low-cost production of highly optimized microLED arrays.

“We are excited about closing our Series A funding with a distinguished group of existing and new investors. We will use the new funds to scale our team and build initial products for our growing family of partners and clients,” said Bardia Pezeshki, Founder and CEO of Avicena.

What were the investors’ thoughts on Avicena?

Commenting on the funding round, Senior Managing Director at Cerberus Capital Management and former Head of Silicon for Google Infrastructure and Cloud, Amir Salek said, “We are excited to participate in this round at Avicena. Avicena has a highly differentiated technology addressing one of the main challenges in modern computer architecture.”

“We believe that Avicena tech can be transformational in unlocking compute-to-memory chip-to-chip high-speed interconnects. Such tech is central to supporting future disaggregated architectures and distributed high-performance computing (HPC) systems,” said Marco Chisari, EVP of Samsung Electronics and Head of Samsung Semiconductor Innovation Center.

“The tech offered by Avicena meets the needs for scaling future HPC and cloud compute networks and covers applications in conventional datacenter and 5G cellular networking.”

“Avicena’s differentiated interconnect technology promises to enable next-generation high-performance processor and memory clusters. Avicena represents a strategic investment opportunity for Micron Technology to support innovation in HPC architectures with our partners and customers,” said Gayathri Radhakrishnan, Senior Director at Micron Ventures.